Design Procedure Based on VHDL Language Transformations
نویسندگان
چکیده
منابع مشابه
Design procedure based on VHDL language transformations
One of the major problems within the VHDL based behavioral synthesis is to start the design on higher abstraction level than the register transfer level (RTL). VHDL semantics was designed strictly for simulation, therefore it was not considered as high-level synthesis language. A novel synthesis procedure was developed, which uses the methodology of high level synthesis. It starts from an abstr...
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ژورنال
عنوان ژورنال: VLSI Design
سال: 2002
ISSN: 1065-514X,1563-5171
DOI: 10.1080/10655140290011159